News & Events

CEO Interview: Addressing the Chall... Addressing the challenges of SoC integration Ever-growing transistor count and higher complexity make System-on-Chip integration an increasingly challenging problem, still waiting for a fully satisfactory EDA solution. Con... READ MORE

Defacto will be part of the Virtual... Defacto will be part of the Virtual DAC experience. Our experts will be present online to chat and provide live presentations on the latest updates around our STAR RTL Design Platform. Latest features of STAR 8.X will be presented in co... READ MORE

What should have been announced at ... EDACafé CEO interview Sanjay : Tell us briefly about Defacto technologies Chouki : Defacto Technologies, we are in EDA business since more than 17 years. We are specialized in SoC integration solutions that we are... READ MORE

Atos Crafts NoC, Pad Ring, More Usi... We are hosting a webinar on May 28th 10-11am PDT (REGISTER HERE) in which Atos talk about how they use our tool in building a proof of concept for the MontB... READ MORE

It’s now possible to access our D... It’s now possible to access our DATE customer presentation on the Virtual DATE Platform ATOS ... READ MORE

Defacto Announces STAR 8.0 and Prov... To deliver greater functionality for next-generation applications such as automotive and mobile, leading-edge SoCs with higher performance at much lower power are needed. Meeting time-to-market requirements is critical to avoid wasting investments... READ MORE

Build Custom SoC Assembly Platforms Defacto’s latest Release STAR 8.0 helps to lower the complexity of SoC Integration design flows where traditionally several sources of design information are required to start building an SoC including design descriptions (mixed RTL code, gate-l... READ MORE

Customer Success Story at DATE Defacto will be exhibiting at DATE in Grenoble on March 9-13. ATOS will present how they built a Scalable NoC... READ MORE

Design Deconstruction It is self-evident that large systems of any type would not be possible without hierarchical design. Decomposing a large system objective into subsystems, and subsystems of subsystems, has multiple benefits. Smaller subsystems can be more easily u... READ MORE

Customer presentation at our booth ... We are organizing a 30mn customer presentation at the Defacto booth (#667) by Tuesday June 4th at 2:00PM. Title: “A unified design data consistency & cohe... READ MORE

Defacto at DAC booth #667 Defacto will be releasing its STAR 8.0 Major Release at DAC this year in Las Vegas (booth #667). Major release features will be presented in conjunction with new customer success stories in SoC design areas including SoC i... READ MORE

Defacto at DAC 2019 booth#667 Build a full SoC with the best trade-off (Time to Market, Power, Performance, Area, IP Reuse, Engineering cost) READ MORE

Defacto is drastically reducing sim... Grenoble, France, February 9th, Defacto Technologies today announced that Synapse Design has tested STAR in collaboration with a major US based semiconductor company in the GPU market. Synapse Design used the RTL design restructur... READ MORE

Structural Verification with STAR Overview STAR provides a large set of structural verification capabilities at RTL. The provided checks are fully automated. On top of that, the user can build and run custom chec... READ MORE

RTL vs. UPF Coherency Checking usin... Overview Maintaining a continuous correlation between power intent (UPF and RTL) is a critical need for all ASIC design teams. Using STAR, the logic design hierarchy and power strategy are tightly linked to each other, so users can intui... READ MORE

Design Centric UPF Generation using... Overview Given a complex RTL design, the related UPF generation process is usually tedious and time consuming. STAR provides a user-friendly wizard to generate a correct-by-construction UPF code which is concise and readable. ... READ MORE

Analysis and Signoff for Restructur... For the devices we build today, design and implementation are unavoidably entangled. Design for low-power, test, reuse and optimized layout are no longer possible without taking implementation factors into account in design, and vice-versa. But de... READ MORE

RTL Correct by Construction Themes in EDA come in waves and a popular theme from time to time is RTL signoff. That’s a tricky concept; you can’t signoff RTL in the sense of never having to go back and change the RTL. But the intent is still valuable – to get the top-le... READ MORE

Defacto in China for Security Appli... Defacto presented this week in China, how security problems can be solved with the Defacto STAR tools RTL code Analysis Build Security score based on an automated extraction of design and code met... READ MORE

A Versatile Design Platform with Mu... Considering the possibility of several segments within a single market, for example desktop, laptop, tablet, and even smartphone in computing market, imagine how many variations of an SoC or IP within it may be required. A desktop processor can be... READ MORE

Socionext Adopts Defacto Solution f... Grenoble, France, June 1st, 2015 --- Defacto Technologies S.A. today announced that Socionext Inc., a leading provider of System-on-Chip solutions, has adopted Defacto Techno... READ MORE