Defacto will be exhibiting at DATE in Grenoble on March 9-13.
ATOS will present how they built a Scalable NoC, SoC with associated Testbench generation using STAR
Presentation will be held at the Customer testimonials Exhibition Theater on March 10th at 5:30PM.
Summary:
As part of the Mont Blanc 2020, European scalable, modular and power efficient HPC processor, ATOS designs and implements a NoC which includes NoC Xpoints, Protocol agents and system cache.
Our Network on Chip (NoC) is based on basic Xpoint modules which are connected to each other to make a scalable NoC. Each Xpoint module has :
- 4 internal CHI Interface (1 per direction) where all the Xpoint modules are connected to
- 2 End Points CHI Interface which are the entry/exit points of IPs on the System on Chip (Soc)
A CHI interface contains 4 channels interfaces: Request, Data, Snoop and Response. Each channel is fully configurable in each direction and is implemented with Configurable System Verilog Interface. This makes a lot of parameters to handle as we plan to implement an 8x8 NoC which includes 64 Xpoint modules with corresponding parameters set accordingly.
Defacto STAR tool is used to efficiently:
- instantiate all the Xpoint modules with corresponding parameters
- connect all the channels with corresponding System Verilog Interface
- connect the Error, status and configuration interfaces
- connect Protocol Agent on End Point interface (internally)
- create NoC entity.
The main benefits to choose Defacto STAR is
- NoC configuration change and RTL generation in seconds
- No need to develop our own tools
NoC module will then be integrated at SoC level and connected to IPs delivered by Third-parties. We also use Defacto STAR tool to generate the SoC RTL and associated Testbench.
