DeFacTo’s mission is to enable designers to complete planning, analysis and implementation of integrated circuit test logic before synthesis by delivering a high quality suite of tools working at the register transfer level (RTL) covering all design for test (DFT) needs.
 
  NEWS

ETS’08 : DeFacTo unveils at the European Test Symposium 2008 two solutions in RTL Design-For-Test : « RTL testability sign-off » and « RTL Scan & DFT Closure ». Please refer to « Solutions » for more information.











 

 

 

 

 

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