"At 40nm nodes and below, there are significantly more steps in the signoff flow which leave very little room for errors to be found late in the flow.

With the deployment of the DeFacTo solution we are now able to prevent any last minute surprises in the DFT implementation."

Vijay Meduri
Vice President of Engineering
PLX Technology

"SIGNOFF flow helps detecting major testability problems at RTL with a very good accuracy, close to 0.5% in comparison to gate-level flow.

HiDFT has robust set of Design Rule Checks and enables new DFT verification capabilites at RTL."

Chandra Sekhar Gandu
DFT Manager
TESSOLVE

"DeFacTo's HiDFT enables us to detect key testability issues and improve test coverage early at RTL.

HiDFT allows a full RTL interoperability with mainstream ATPGs and test compression tools."

Kazunobu Sugaya
Design Engineering Manager
RICOH