Titles of the presentations below are:
SOCIONEXT: Generating a Layout friendly RTL/Netlist by Defacto STAR
Major Semicondutor Customer: A Cost-effective RTL Partitioning Methodology for Large SoC Designs
(Austin TX time)
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A Versatile Design Platform with Multi-Language APIs
By using the STAR platform designers can create, explore, modify, and verify RTL designs within the same design flow. This is an ideal platform for fast design prototyping as well as development of complete new applications in shortest possible time.
Read the full article on Semiwiki:
Defacto is creating series of videos about typical applications when using the Defacto's STAR solution.
Enjoy the following first videos !
Defacto introduces the RTL "Build&Signoff" design methodology. Based on a set of EDA tools that work seamlessly together, a user can build, explore, edit and verify RTL design within the same design flow.
The "Unified Design Flow" based on the STAR solution which helps build a design flow to jointly handle IPXACT, RTL, TLM (SystemC) & UPF languages with the related design tasks.
“So we have STAR in place and my team uses it daily. I like having it as one platform, where we only have to learn one set of commands and can do things in one shot. The time savings -- days for connecting IPs and weeks for verification -- adds up. Plus it's one less thing for me to worry about. It's like having a toolbox in my garage that gives me the right tool for my job when something comes up. Except with all the apps you can add, STAR is more like a Home Depot”
Products & Solutions
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