Defacto at DAC 2019 booth#667

 

Build a full SoC with the best trade-off (Time to Market, Power, Performance, Area, IP Reuse, Engineering cost) 

 

We were happy to announce the new benefits you can have based on success stories with our STAR Platform:

  • Reduce design cycles – From months to days
  • Detect earlier connectivity and testability issues
  • Save Area - Between 5 to 10%
  • Monitor real time the IP integration process
  • Reduce simulation time - Between 4 to 10X
  • Validate quickly 3rd party source IPs
  • Increase IP reuse ratio
  • Highlight complex and difficult to maintain RTL code

And don't miss our customer presentation "A unified design data consistency & coherency checking solution" - Tuesday June 4th at 2:00PM at the Defacto booth (#667)

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