STAR for Security Applications

Overview

This week, Defacto team presented during the Avant SoC Design Forum in Shanghai, China, how to ‘Build and Signoff’ complex and Secure SoCs.

Today hardware security is a major concern. It can no longer be ignored.

 

Design for security becomes mandatory to ensure confidence at all levels chip and system.

Defacto design tools are offering new capabilities to signoff an IP core or an SoC including security aspects. In particular,

Defacto’s STAR Checker extracts design complexity metrics with direct correlation to security weaknesses. Given an RTL design, a code complexity score is extracted which warns a designer if the overall design structure might be an easy target to security threats.

 

More generally, typical security challenges that can be considered by STAR design solutions are:

  • Help detect suspicious design structures
  • Identify security vulnerabilities
  • Implement coherency checks at several design levels
  • Simulate external attacks 
  • Restructure code hierarchy 
  • Strengthen Non-Regression tests in the validation flow

 

 Typical Examples

IP Validation

Structural Checks

  • Detect and report feedthroughs or loopback Connections across any hierarchy
  • Clock path extraction
  • Design comparison
  • Pin to pin connectivity checks

Complexity evaluation

  • Metrics extraction and regression tests

UPF and SDC Coherency checks

DFT Rule Checks & Exploration

  • Easy detection and debug process at RTL

Metric Extraction

Through Code Complexity Metrics (CCM), STAR offers advanced RTL linting capabilities. CCM measures, captures the level of complexity of an RTL code (Verilog, VHDL, System Verilog) and lets designers and design managers, better contain the increasing complexity of RTL databases. CCM also helps in preventing synthesis and post-synthesis problems by pinpointing critical areas of the RTL code.

STAR Platform Architecture

Press-button extraction of a rich number of metrics. Various types of metrics can be extracted

Hardware metrics

  • Number of ports, nets, instances, designs 
  • Number of memory elements
  • Connections  

Software metrics

  • McCabe score (Code complexity)
  • Number of lines of code
  • Number of comments
  • Number of empty lines 

Design Restructuring for Security

Add combinatorial sequential logic to secure the access to a sensitive register

Insert IP secured blocks 

Add wrapper to isolate parts of the design

Move the logic into secured IP blocks

 

CONTACT US

Overview

Through Code Complexity Metrics (CCM), STAR offers advanced RTL linting capabilities. CCM measures, captures the level of complexity of an RTL code (Verilog, VHDL, System Verilog) and let designers and design managers, better contain the increasing complexity of RTL databases. CCM also helps with preventing synthesis and post-synthesis problems by pinpointing critical areas of the RTL code.

Connection